The present invention relates to the connections among wiring lines in semiconductor integrated circuit devices, and more particularly to techniques which are effective when applied to a semiconductor integrated circuit device adopting a master slice scheme.
A semiconductor integrated circuit device adopting the master slice scheme is such that connections are done within and among basic cells regularly arrayed in a matrix shape, by the use of a plurality of layers of signal wiring. Although the functions and arrayal of the basic cells are substantially fixed, the connection pattern of the signal wiring can be altered to achieve a required logic. Therefore, the semiconductor integrated circuit device adopting the master slice scheme permits many kinds of products to be developed in a short period of time merely by altering the connection pattern.
In the semiconductor integrated circuit device adopting the master slice scheme, the connection pattern of the signal wiring is formed by a computerized DA (Design Automation) system. In the DA system (which is an automatic placement and routing system), the following processing steps are executed:
First, on the basis of a designed logic circuit diagram, logic circuit information items are input to the DA system.
Subsequently, the DA system places or allocates basic cell patterns, stored as fixed patterns in a data base, on a data base model of the target semiconductor integrated circuit device (a base chip). Also, on the basis of the input logic circuit information items, the connection patterns of logic circuits are placed within the basic cell patterns (wiring lines within basic cells are placed). The connection patterns of the logic circuits construct, at least, parts of these logic circuits. The placement of the connection patterns of the logic circuits is automatically effected by the DA system.
Next, the DA system connects the individual logic circuits with signal wiring lines by automatic routing, to implement complete logic items which are to be included in the semiconductor integrated circuit device.
Next, the information items of the logic items implemented by the DA system are converted into data for mask production on the basis of design rules within this DA system.
Thereafter, a mask for connections is produced by, for example, an electron-beam lithographic apparatus on the basis of the data for mask production A device process is performed using the connecting mask, thereby to complete the semiconductor integrated circuit device which includes the predetermined logic items.